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70 terms / One connected reference

Electronics glossary,
clearly defined.

From integrated-circuit fundamentals to AI processors, stacked memory, and robotics. Find a term, see it in context, and follow the connections.

70 terms · All topics

Every term has a full page: click a term name to explore its explanation, examples and related concepts. The # links still point to entries in this directory. Start with integrated-circuit basics or explore our four AI & robotics guides. For additional terminology, visit Hybrid’s full electronics glossary.

0-9

Memory & chiplets

2.5D packaging

Side-by-side die integration

2.5D packaging commonly connects dies arranged side by side through a high-density interposer or related interconnect structure within one package. (Samsung: heterogeneous integration)

In context. An accelerator package can place logic next to HBM stacks. The package can be described as 2.5D even though the memory itself contains vertically stacked dies.

Read the expanded 2.5D packaging definition →

Read the guide: What are chiplets? →

Memory & chiplets

3D stacking

Vertical die integration

3D stacking places semiconductor dies above one another with connections between layers. Different technologies use different bonding and vertical interconnect methods. (Samsung: heterogeneous integration)

In context. “3D” describes an integration arrangement, not a universal interface. Consult the package description to understand which dies are stacked and how they connect.

Read the expanded 3D stacking definition →

Read the guide: What are chiplets? →

A

Robotics

Actuator

A device that produces physical motion

An actuator converts energy into mechanical work or force. Robots use actuators such as electric motors, pneumatic devices, and hydraulic mechanisms to move. (University of Rochester: actuators)

In context. An actuator is not necessarily an IC. A robot’s electronics sense, compute, and drive; the actuator is the physical mechanism that performs the movement.

Read the expanded Actuator definition →

Read the guide: How integrated circuits power robots →

AI & computing

AI accelerator

Hardware for artificial intelligence workloads

An AI accelerator is hardware, or a hardware feature, optimized to perform operations used in AI workloads. It may be a dedicated device or a processing block integrated with other functions. (Intel: AI accelerators)

In context. A GPU, NPU, or purpose-built accelerator can play this role. Read the supported workloads and software requirements rather than assuming every accelerator runs the same models.

Read the expanded AI accelerator definition →

Read the guide: GPU vs. NPU vs. CPU →

IC types

ASIC

Application-specific integrated circuit

ASIC stands for application-specific integrated circuit: an IC designed for a particular application rather than a general-purpose role. (Hybrid Electronics glossary)

In context. The abbreviation describes a chip’s intended role. It does not, by itself, tell you its package, supply voltage, interfaces, or whether it can be substituted for another device.

Read the expanded ASIC definition →

B

Packages

BGA

Ball grid array

A BGA package uses an array of solder balls on its underside to make connections to a circuit board.

In context. A BGA and a leaded package can contain devices with similar functions while requiring entirely different board footprints. Check the package drawing, not just the family name.

Read the expanded BGA definition →

C

Robotics

CAN bus

Controller Area Network

CAN is a message-based serial communications bus that allows multiple nodes to communicate. Common high-speed CAN physical layers use differential signaling on a pair of wires. (Texas Instruments: CAN fundamentals)

In context. Separate the CAN controller, transceiver, and higher-level application protocol when reading a design. Do not apply the data-rate limits of one CAN variant to every CAN implementation.

Read the expanded CAN bus definition →

Read the guide: How integrated circuits power robots →

Memory & chiplets

Chiplet

A die designed as a system building block

A chiplet is a semiconductor die designed to operate alongside other dies as part of a larger system. Multiple chiplets can be assembled into one packaged component. (Arm: chiplets)

In context. A design may separate compute, memory, and input/output functions across dies. Chiplets are not automatically interchangeable parts that can be mixed without interface and package engineering.

Read the expanded Chiplet definition →

Read the guide: What are chiplets? →

AI & computing

CPU

Central processing unit

A CPU executes program instructions and handles general-purpose computation and operating-system work. Its flexible processing cores support a wide variety of tasks. (Intel: CPU vs. GPU)

In context. When reading a system diagram, look for the CPU’s coordinating role as well as any GPU or NPU blocks. “CPU” is a function, not a guarantee that all processing lives on a separate chip.

Read the expanded CPU definition →

Read the guide: GPU vs. NPU vs. CPU →

D

Robotics

Depth camera

A camera that measures scene depth

A depth camera produces an image or data map whose values describe distance from the camera. Some devices provide both depth and color information, often called RGB-D. (RealSense: depth cameras)

In context. Stereo, structured-light, and time-of-flight systems measure depth in different ways. Select the technology for the actual scene and lighting rather than treating all depth cameras as identical.

Read the expanded Depth camera definition →

Read the guide: How integrated circuits power robots →

Fundamentals

Die

The semiconductor circuit itself

A die is the small piece of semiconductor material containing a fabricated circuit before it is considered together with its external package.

In context. A useful distinction is die versus package: the die contains the circuit; the package protects it and provides connections that are easier to use on a board.

Read the expanded Die definition →

Memory & chiplets

Die-to-die interconnect

D2D · links within a multi-die package

A die-to-die interconnect carries signals between semiconductor dies within a package. The physical connection and communication protocol are both part of making those dies work together. (ASE: UCIe specification)

In context. Do not confuse an internal die-to-die link with a board-level connector. Check the interface specification and packaging requirements for the particular design.

Read the expanded Die-to-die interconnect definition →

Read the guide: What are chiplets? →

IC types

Digital IC

Digital integrated circuit

A digital IC processes discrete logic states, commonly represented as binary 0 and 1, to perform operations such as logic or data storage.

In context. A logic gate, a processor, and a memory device serve different purposes, even though all can be digital ICs. “Digital” is a broad category, not a specific function.

Read the expanded Digital IC definition →

Packages

DIP

Dual in-line package

A DIP has two parallel rows of pins and is a familiar through-hole package for integrated circuits.

In context. DIP packages are common in breadboard demonstrations. The pin count alone is not enough to select a replacement: verify the body dimensions, pinout, and electrical function too.

Read the expanded DIP definition →

AI & computing

DSP

Digital signal processing · digital signal processor

DSP refers to processing signals represented digitally. In hardware descriptions, it can also refer to a processor optimized for that work; DSP instructions may instead be built into a CPU. (Arm: digital signal processing)

In context. Audio, voice, and sensor applications are useful places to encounter DSP. Check whether the document means a signal-processing technique, a dedicated processor, or instruction-set extensions.

Read the expanded DSP definition →

Read the guide: GPU vs. NPU vs. CPU →

E

AI & computing

Edge AI

AI computation near the data

Edge AI runs AI applications near the devices or environments producing the data, rather than relying entirely on a centralized cloud or data center. (NVIDIA: edge AI)

In context. In a robot example, a model can analyze sensor data locally. “Edge” describes where computation happens; it does not identify one chip type or mean the system never connects to the cloud.

Read the expanded Edge AI definition →

Read the guide: How integrated circuits power robots →

Robotics

Encoder

Position or motion feedback device

An encoder provides position or movement information that a control system can use as feedback. Motor-control systems can use incremental or absolute encoders. (Texas Instruments: motor control)

In context. Wheel encoder counts can feed odometry, while a joint encoder can support motion control. Review how a particular encoder represents position and connects to its controller.

Read the expanded Encoder definition →

Read the guide: How integrated circuits power robots →

Robotics

EtherCAT

Real-time industrial Ethernet

EtherCAT is an industrial Ethernet technology designed for real-time automation communication. Devices process data as frames pass through the network. (EtherCAT Technology Group)

In context. In a multi-axis machine, communication timing and synchronization matter alongside processor speed. A normal Ethernet connector alone does not establish EtherCAT device capability.

Read the expanded EtherCAT definition →

Read the guide: How integrated circuits power robots →

F

IC types

FPGA

Field-programmable gate array

An FPGA is a type of programmable integrated circuit used to implement digital logic.

In context. Reading “FPGA” tells you the broad device class. For an actual design, use the manufacturer’s documentation to determine the available logic resources, interfaces, package, and configuration requirements.

Read the expanded FPGA definition →

G

AI & computing

GPU

Graphics processing unit

A GPU is a processor designed to perform many operations in parallel. Originally associated with graphics, programmable GPUs also execute suitable AI and other compute workloads. (Intel: CPU vs. GPU)

In context. A GPU can render an image or process parallel calculations for a neural network. That does not mean it replaces the CPU or accelerates every kind of program.

Read the expanded GPU definition →

Read the guide: GPU vs. NPU vs. CPU →

H

Memory & chiplets

HBM

High-bandwidth memory

HBM is a stacked DRAM architecture that uses a wide interface to transfer large amounts of data. Multiple memory dies are connected vertically and can be packaged close to a processor. (Micron: high-bandwidth memory)

In context. On an accelerator diagram, distinguish the compute die from the HBM stacks supplying data. HBM is memory, not the processor performing the AI calculations.

Read the expanded HBM definition →

Read the guide: What is HBM? →

Memory & chiplets

Heterogeneous integration

Combining different dies or technologies

Heterogeneous integration combines components with different functions, technologies, or manufacturing processes into a larger integrated system, often within one package. (Samsung: heterogeneous integration)

In context. A package combining logic and memory is a useful example. The term describes the integration approach, not a guarantee of lower cost or higher performance.

Read the expanded Heterogeneous integration definition →

Read the guide: What are chiplets? →

I

Robotics

IMU

Inertial measurement unit

An IMU combines inertial sensors, typically accelerometers and gyroscopes, to measure acceleration and angular motion. Its readings are inputs to motion-estimation algorithms. (Analog Devices: IMU documentation)

In context. Do not treat raw IMU output as an automatically accurate position. Calibration and the estimation method matter when combining it with camera or other sensor data.

Read the expanded IMU definition →

Read the guide: How integrated circuits power robots →

AI & computing

Inference

Using a trained AI model

Inference is the use of a trained AI model to produce an output from new input data. It is distinct from the training process that creates or updates the model. (NVIDIA: edge AI)

In context. Recognizing an object in a new camera image is an inference task. Learning the model from examples is training; evaluating a deployed model still requires application-specific testing.

Read the expanded Inference definition →

Read the guide: GPU vs. NPU vs. CPU →

Memory & chiplets

Interposer

An intermediate connection structure

An interposer provides routing and connections between dies and the surrounding package structure. Advanced packages can use different interposer materials and constructions. (Samsung: heterogeneous integration)

In context. In a 2.5D example, logic and HBM can sit side by side on a silicon interposer. Not every multi-die package uses that exact arrangement.

Read the expanded Interposer definition →

Read the guide: What are chiplets? →

L

Robotics

LiDAR

Light detection and ranging

LiDAR measures distance using light, commonly laser pulses, and can produce spatial measurements organized as point clouds. Those measurements can support robotic mapping and localization. (MathWorks: SLAM)

In context. The LiDAR sensor supplies measurements; a SLAM algorithm uses measurements to estimate a map and location. They are related but not the same thing.

Read the expanded LiDAR definition →

Read the guide: How integrated circuits power robots →

Signals

Logic gate

A building block of digital logic

A logic gate performs a logic operation on its inputs to produce an output, and gates can be combined into larger digital circuits.

In context. A device can contain a few individual gates or combine many gates into a more complicated function. Start with the function diagram when learning what a logic IC does.

Read the expanded Logic gate definition →

Robotics

Loop closure

Recognizing a previously visited place

In SLAM, loop closure identifies a return to a previously visited location so the system can correct accumulated mapping and localization error. (MathWorks: SLAM)

In context. A robot that recognizes a familiar corridor can use that match to improve its map. The phrase describes a mapping operation, not a motor-control feedback loop.

Read the expanded Loop closure definition →

Read the guide: How integrated circuits power robots →

M

Robotics

Machine vision

Automated interpretation of images

Machine vision uses cameras and processing to inspect, identify, measure, or locate objects so an automated system can make decisions. (Cognex: machine vision)

In context. A robot locating a component before picking it is a useful example. Machine vision is a system capability, not the name of one camera chip or AI model.

Read the expanded Machine vision definition →

Read the guide: How integrated circuits power robots →

Memory & chiplets

Memory bandwidth

Data transferred per unit of time

Memory bandwidth describes the rate at which data can be transferred through a memory interface, commonly expressed in gigabytes or terabytes per second. (Micron: high-bandwidth memory)

In context. Keep storage capacity and transfer rate separate: GB describes an amount of data, while GB/s describes a rate. A peak interface specification is not a promise of sustained application performance.

Read the expanded Memory bandwidth definition →

Read the guide: What is HBM? →

Robotics

Motor driver

Electronics that drive a motor

A motor driver provides the electrical drive needed to operate a motor under control commands. Products differ in how much control logic and power circuitry they integrate. (Texas Instruments: motor control)

In context. Distinguish the controller deciding what motion is wanted from the driver delivering electrical drive. Some products combine these roles; check the block diagram.

Read the expanded Motor driver definition →

Read the guide: How integrated circuits power robots →

N

AI & computing

NPU

Neural processing unit

An NPU is a specialized processor or processing block designed to accelerate neural-network computations. NPUs are one type of AI accelerator. (Intel: AI accelerators)

In context. For a device running image or speech models, ask which model operations its NPU supports. The NPU label alone does not establish model compatibility or actual application speed.

Read the expanded NPU definition →

Read the guide: GPU vs. NPU vs. CPU →

O

Robotics

Odometry

Estimating motion over time

Odometry estimates changes in position and orientation from motion-related measurements. Wheel odometry, for example, uses encoder measurements and a model of the vehicle. (MathWorks: wheel odometry)

In context. For a two-wheel differential-drive example, left and right encoder counts contribute to estimates of position and heading. An estimate is not an independent measurement of absolute location.

Read the expanded Odometry definition →

Read the guide: How integrated circuits power robots →

P

Packages

Package

The physical housing and connections

An IC package protects the die and provides external terminals that connect its circuit to other components.

In context. Function and package are separate questions. “Voltage regulator” describes a function; “SOIC” describes a package family. You need both electrical and mechanical details to identify a usable part.

Read the expanded Package definition →

Packages

Pinout

The assignment of device connections

A pinout identifies the location and function of a device’s external connections, including power, ground, inputs, and outputs.

In context. Use the manufacturer’s drawing to establish viewing direction and pin 1. A package that physically fits a board is not necessarily electrically compatible with it.

Read the expanded Pinout definition →

Q

Packages

QFN

Quad flat no-lead

A QFN is a surface-mount package with connection pads around the underside edges rather than long projecting leads.

In context. Do not select a board footprint from the letters QFN alone. Compare the manufacturer’s dimensions, pad arrangement, pin count, and any exposed-pad requirements.

Read the expanded QFN definition →

Packages

QFP

Quad flat package

A QFP is a surface-mount package with leads extending from all four sides of its body.

In context. QFP and QFN sound similar but make their board connections differently. Always use the exact package designation and drawing rather than relying on a familiar-looking abbreviation.

Read the expanded QFP definition →

AI & computing

Quantization

Reduced-precision model representation

In AI, quantization reduces the numerical precision used to represent a model. It can reduce model storage and computation requirements, but the effect on accuracy must be evaluated. (NVIDIA: quantization)

In context. Do not compare two accelerator claims without checking their numerical formats. A lower-precision deployment should be tested with the actual model and hardware rather than assumed equivalent.

Read the expanded Quantization definition →

Read the guide: GPU vs. NPU vs. CPU →

R

Robotics

Real-time control

Control with defined timing requirements

Real-time control requires responses within specified timing constraints, not simply high average computing speed. Embedded operating systems can help schedule work to meet those constraints. (FreeRTOS: RTOS fundamentals)

In context. For a motor-control example, define the deadline for reading feedback and updating the drive. Adding a faster processor does not by itself demonstrate that every deadline will be met.

Read the expanded Real-time control definition →

Read the guide: How integrated circuits power robots →

Robotics

ROS 2

Robot Operating System 2 · software framework

ROS 2 is a collection of software libraries and tools for developing robot applications. It supports the software side of robotics rather than describing a semiconductor device. (ROS 2 documentation)

In context. Keep the layers separate: ROS 2 helps build robot applications, an operating system manages computing resources, and ICs execute the software and interface with hardware.

Read the expanded ROS 2 definition →

Read the guide: How integrated circuits power robots →

Robotics

RTOS

Real-time operating system

An RTOS is an operating system designed for predictable response to events under timing constraints. Its scheduler manages tasks, often using priorities. (FreeRTOS: RTOS fundamentals)

In context. An RTOS is software, not a chip. Task priorities help organize execution, but they cannot make impossible timing requirements achievable.

Read the expanded RTOS definition →

Read the guide: How integrated circuits power robots →

S

Fundamentals

Semiconductor

The material behind the chip

Semiconductor material, typically silicon in the ICs described here, forms the substrate on which integrated-circuit components are fabricated.

In context. “Semiconductor” and “integrated circuit” describe different things. The first can describe a material or a broad device category; the second describes an interconnected electronic circuit.

Read the expanded Semiconductor definition →

Robotics

Sensor fusion

Combining information from multiple sensors

Sensor fusion combines measurements from different sensors to estimate a system’s state or surroundings. In robotics, it can combine cameras, IMUs, LiDAR, and other inputs. (MathWorks: SLAM)

In context. A navigation system might combine inertial motion readings with visual observations. Calibration and consistent interpretation of the measurements remain important.

Read the expanded Sensor fusion definition →

Read the guide: How integrated circuits power robots →

Robotics

Servo controller

Feedback-based motion control

A servo controller uses feedback to control a motor or actuator toward a requested state, such as a position or velocity. It is part of a closed-loop motion system. (University of Rochester: actuators)

In context. A joint may compare its target angle with measured position, then adjust its drive. “Servo” describes feedback control, not one universal package or interface.

Read the expanded Servo controller definition →

Read the guide: How integrated circuits power robots →

Packages

SOIC

Small-outline integrated circuit package

An SOIC is a small surface-mount package with leads along two sides, often compared with a smaller, surface-mount version of a DIP.

In context. The same general package name can cover different body widths and pin counts. A specific manufacturer package drawing is a better guide than a photograph.

Read the expanded SOIC definition →

Memory & chiplets

SRAM

Static random-access memory

SRAM stores data using transistor-based cells that do not need periodic refresh while powered. “Static” does not mean nonvolatile; power is still needed to retain its contents. (Samsung: DRAM and SRAM)

In context. When learning memory terminology, keep SRAM’s lack of refresh separate from long-term storage. Compare its role in a device with the separate DRAM memory subsystem.

Read the expanded SRAM definition →

Read the guide: What is HBM? →

Packages

Surface-mount

SMT · SMD

Surface-mount components are attached to conductive pads on a circuit board’s surface rather than using leads inserted through the board.

In context. SOIC, QFP, QFN, and BGA are different surface-mount package styles. The mounting method alone does not tell you the device’s function or assembly requirements.

Read the expanded Surface-mount definition →

T

Packages

Through-hole

A board-mounting method

Through-hole components have leads that pass through holes in a circuit board and are connected by soldering.

In context. A DIP is a familiar through-hole IC package. When converting a prototype into a board design, keep the package choice separate from the circuit’s electrical requirements.

Read the expanded Through-hole definition →

AI & computing

TPU

Tensor Processing Unit

A TPU is a Google-developed application-specific integrated circuit designed to accelerate machine-learning workloads, especially large matrix operations. (Google Cloud: TPU introduction)

In context. TPU is not a generic name for every AI chip. Check the specific TPU generation, supported software, and workload requirements when reading a platform description.

Read the expanded TPU definition →

Read the guide: GPU vs. NPU vs. CPU →

AI & computing

Training

Learning an AI model from data

Training is the process of developing an AI model from data so that it can perform a task. A trained model can then be deployed to make predictions through inference. (NVIDIA: edge AI)

In context. Separate the computer used to train a model from the hardware that runs it in a robot. They need not be the same device or even be in the same location.

Read the expanded Training definition →

Read the guide: GPU vs. NPU vs. CPU →

Fundamentals

Transistor

An electronic building block

Transistors are electronic devices that can be integrated and interconnected with other components to create the functions inside an IC.

In context. It helps to think in levels: transistors are devices, an IC connects devices into a circuit, and a circuit board connects ICs and other components into a system.

Read the expanded Transistor definition →

U

Memory & chiplets

UCIe

Universal Chiplet Interconnect Express

UCIe is an open specification for communication between chiplets within a package. Its scope includes physical interconnect and protocol aspects of die-to-die communication. (ASE: UCIe specification)

In context. Treat UCIe support as one part of compatibility, not permission to combine arbitrary chiplets. Review the relevant version, implementation, and system requirements.

Read the expanded UCIe definition →

Read the guide: What are chiplets? →

V

IC types

Voltage regulator

A power-supply function

A voltage regulator is a circuit used to control a supply voltage, and voltage-regulator functions are commonly available as ICs.

In context. For a real application, start with the manufacturer’s operating conditions and recommended circuit. Do not infer the allowable input voltage, current, or heat dissipation from the package size.

Read the expanded Voltage regulator definition →

W

Fundamentals

Wafer

The starting surface for many dies

A semiconductor wafer is used in fabrication to form the layers and components that will become integrated-circuit dies.

In context. Keep the manufacturing sequence clear: wafer processing forms circuits, individual dies are separated, and packaging makes the circuits practical to connect and handle.

Read the expanded Wafer definition →

Definitions are introductory, not component specifications. Use the manufacturer’s datasheet for operating limits, pinouts, footprints, and design decisions. About this resource

70 standalone definitions

From materials to processors.

Every term in the A–Z directory now has a full page. Start with these building blocks, then follow related definitions into computing and robotics.

Glossary / Integrated circuit

IC · chip · microchip

An integrated circuit, or IC, combines interconnected electronic devices on semiconductor material to perform one or more electronic functions.

Read the Integrated circuit definition →
Glossary / Semiconductor

A controllable electronic material

A semiconductor is a material whose electrical conductivity depends on its structure, mobile charge carriers and conditions such as temperature.

Read the Semiconductor definition →
Glossary / Transistor

An electronic switching and amplification device

A transistor is a semiconductor device that controls current and can be used to switch or amplify electrical signals.

Read the Transistor definition →
Glossary / CPU

Central processing unit

A CPU, or central processing unit, executes program instructions and performs general-purpose processing tasks in a computing system.

Read the CPU definition →
Glossary / Microcontroller

MCU · embedded controller

A microcontroller, or MCU, combines a CPU, memory and input/output resources in an integrated circuit used to control an embedded application.

Read the Microcontroller definition →
Glossary / System-on-chip

SoC · integrated processing system

A system-on-chip, or SoC, integrates processing and other system functions, such as memory subsystems, interfaces and accelerators, into an integrated circuit.

Read the System-on-chip definition →
Glossary / GPU

Graphics processing unit

A GPU, or graphics processing unit, is a processor designed to perform many suitable calculations in parallel, supporting graphics rendering and other compute-intensive workloads.

Read the GPU definition →
Glossary / NPU

Neural processing unit

An NPU, or neural processing unit, is a specialized hardware accelerator designed to execute neural-network operations.

Read the NPU definition →
Glossary / HBM

High-bandwidth memory

HBM, or high-bandwidth memory, is a stacked DRAM architecture that uses a wide interface to move large amounts of data between memory and a processing device.

Read the HBM definition →
Glossary / Chiplets

Functional dies combined within a system

A chiplet is a semiconductor die designed to work as part of a larger system, with multiple dies combined into a packaged component.

Read the Chiplets definition →